Laser micromachining and electrical structures formed thereby

ABSTRACT

A unified process of making an electrical structure includes performing a plurality of laser etching operations on a workpiece, without removing the workpiece from a laser processing system. The workpiece includes a conductive material disposed on an electrically insulating substrate, and the plurality of laser etching operations include, but are not limited to, two or more of forming a fiducial, forming thick metal traces separated by high aspect ratio spaces, cutting an alignment hole, cutting a folding line, and singulating the electrical structure. In another aspect of the invention, a database is prepared, and communicatively coupled to the laser processing system to provide control signals that direct a portion of the plurality of operations of the laser processing system, wherein each plurality of etching operations is defined with respect to a common coordinate system.

RELATED APPLICATIONS

This application claims the benefit of earlier filed provisionalapplication Ser. No. 60/268,382 which was filed Feb. 12, 2001;provisional application Ser. No. 60/277,118 which was filed Mar. 19,2001, and provisional application Ser. No. 60/277,349 which was filedMar. 19, 2001.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The methods and apparatus of the present invention relate generally tothe fabrication of electrical structures by laser etching, and moreparticularly to the fabrication of high line-density structures havinghigh aspect ratio spaces between relatively large cross-sectionconductors.

2. Background

Electrical systems very typically include a variety of electricalcomponents mounted upon, or otherwise attached to a substrate. Such asubstrate provides mechanical support for component attachment as wellas commonly provides a variety of electrically conductive pathwaysthereon for electrically coupling the various electrical components. Oneexample of such a substrate is the printed circuit board.

Printed circuit board (PCB) technology has been in development for manyyears. The electrically conductive pathways, or traces, found on printedcircuit boards are conventionally formed by processes in which a blanketlayer of conductive material, typically copper, is masked and thenchemically etched (i.e., wet etched) such that portions of the copperunder the mask pattern remain on the board while the exposed portionsare removed. However, the conventional wet chemical etch process is anisotropic etch resulting in the traces having sidewalls with curved, orsloping shapes (i.e., not substantially parallel to each other). Anotherway of describing this geometrical characteristic is that the traceshave relatively wide portions immediately adjacent the substrate, andthat the traces narrow in width as they extend away from the surface ofthe substrate. Unfortunately, these isotropic etch results, have adverseconsequences for the electrical characteristics of the traces. Moreparticularly, these undesirably formed traces, provide unpredictableresistance and capacitance values as interconnect lines.

Referring to FIGS. 1, 2, and 3, illustrations of the undesired resultsof conventional wet etching of tin masked copper lines are shown. It isnoted that across a typical panel, that is, a substrate or board, it isnot uncommon for the plated thickness of copper to vary by plus or minus12 microns. As can be seen in FIGS. 1-3, several examples ofisotropically etched copper traces are shown. FIG. 3 illustrates theresults of conventional manufacturing practices in producing featuresthat are nominally 150 microns-wide. In addition to sloping sidewalls,it can be seen that the actual feature sizes achieved varies with thevarying thickness of copper across the panel. More particularly, trace304, which was formed in a region of nominal copper thickness, can beseen to be narrower than trace 310, which was formed in a region of lessthan nominal copper thickness, whereas trace 304 is wider than trace316, which was formed in a region of greater than nominal copperthickness. FIG. 2 is similar to FIG. 3, but illustrates the results ofconventional manufacturing practices in producing features that arenominally 125 microns wide. In addition to the undesirable slopingsidewalls, it can be seen that the actual feature sizes achieved varieswith the varying thickness of copper. More particularly, trace 204,which was formed in a region of nominal copper thickness, can be seen tobe narrower than trace 210, which was formed in a region of less thannominal copper thickness, whereas trace 204 is wider than trace 216,which was formed in a region of greater than nominal copper thickness.Finally, it can be seen that FIG. 1 illustrates the results ofconventional manufacturing practices in producing features that arenominally 100 microns wide, at which point the overetching seen in thethick copper regions produces trace widths which generally tend to beunacceptably narrow, and are usually unworkable for very high speedapplications. Still referring to FIG. 1, in addition to undesirablesloping sidewalls, it can be seen that the actual feature sizes achievedvaries with the varying thickness of copper. Trace 104, which was formedin a region of nominal copper thickness, can be seen to be narrower thantrace 110, which was formed in a region of less than nominal copperthickness, whereas trace 104 is wider than trace 116, which was formedin a region of greater than nominal copper thickness. FIGS. 1-3illustrate the difficulties encountered in forming traces byconventional methods. This problems are grow worse as the dimensionssought to be achieved grow smaller.

Although printed circuit boards have been used to illustrate theproblems encountered in conventional manufacturing of traces, suchproblems are found in a wide variety of products including spacetransformers, chip packages, and the like.

What is needed are electrical structures, suitable for products such asthe space transformer, where those products have thick metal for currentcarrying capacity, and high aspect ratio spaces therebetween to providea high density of conductors per linear measurement unit, and methodsfor the manufacture of such electrical structures.

SUMMARY OF THE INVENTION

Briefly, a unified process of making an electrical structure includesperforming a plurality of laser etching operations on a workpiece,without removing the workpiece from a laser processing system. Theworkpiece includes a conductive material disposed on an electricallyinsulating substrate, and the plurality of laser etching operationsinclude, but are not limited to, two or more of, forming a fiducial,forming thick metal traces separated by high aspect ratio spaces,forming an alignment hole, forming a folding line, forming a cuttingline, and singulating the electrical structure.

In further aspect of the present invention, a database is prepared, andcommunicatively coupled to the laser processing system to providecontrol signals that direct a portion of the plurality of operations ofthe laser processing system, wherein each of the plurality of etchingoperations is defined with respect to a common coordinate system.

In a still further aspect of the present invention, an electricalstructure in accordance with the present invention, provides thefunction of a space transformer.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional representation of a conventionally etched,thick metal, set of traces disposed on a substrate, where the desirednominal trace width is 100 microns.

FIG. 2 is a cross-sectional representation of a conventionally etched,thick metal, set of traces disposed on a substrate, where the desirednominal trace width is 125 microns.

FIG. 3 is a cross-sectional representation of a conventionally etched,thick metal, set of traces disposed on a substrate, where the desirednominal trace width is 150 microns.

FIG. 4 is a cross-sectional representation of thick metal traces, inaccordance with the present invention, having substantially constanttrace width, having varying trace thickness, having trace sidewalls thatare substantially perpendicular to the substrate, and havingsubstantially constant space width.

FIG. 5 is a cross-sectional representation of thick metal traces, inaccordance with the present invention, having substantially constanttrace cross-sectional areas, having trace sidewalls that aresubstantially perpendicular to the substrate, and having substantiallyconstant space width.

FIG. 6 is a cross-sectional representation of thick metal traces, inaccordance with the present invention, having substantially constanttrace width, having substantially constant trace thickness, having tracesidewalls that are substantially perpendicular to the substrate, andhaving substantially constant space width.

FIG. 7 is a flowchart of an illustrative process in accordance with thepresent invention.

FIG. 8 is a flowchart of an alternative illustrative process, inaccordance with the present invention.

FIG. 9 is a flowchart of another alternative illustrative process, inaccordance with the present invention.

DETAILED DESCRIPTION

Generally, in accordance with the present invention, methods of laseretching to remove portions of one or more materials from a workpiece,are used to produce electrical structures characterized by conductivetraces disposed on an electrically insulating substrate, the conductivetraces separated from one another by high aspect ratio spaces. Spacesmay be thought of as openings in the materials that are superjacent thesubstrate. These conductive traces are typically formed of copper of the“thick metal” variety, i.e., typically between about 9 microns and about72 microns in thickness. These electrical structures may alternativelybe characterized as having a high density of conductive traces relativeto the high aspect ratio spaces that separate the conductive traces. Thesubstrates may be of the rigid or flex variety, and may be comprised oforganic or inorganic materials. The substrates may have a conductivematerial on one side only, or may be more complex such as withconductive material on two opposing major surfaces and/or withconductive traces disposed within the substrate itself (sometimesreferred to as a complex substrate).

Electrical structures in accordance with the present inventionadvantageously provide metal traces of substantially constant width withrespect to a specified nominal width, and spaces of substantiallyconstant width with respect to a specified nominal width, as compared toconventionally prepared thick metal traces on rigid or flexiblesubstrates. Such substantially constant width traces may have varyingthicknesses as the thickness of the metal varies across a workpiece.Alternatively, embodiments of the present invention may includemachining the workpiece such that in addition to constant width andconstant space, the traces have constant thickness. It will beappreciated that with respect to expressions such as constant width, orspace, or thickness, what is meant is that the variations in width,space, or thickness, are so small as to be negligible, particularly ascompared to the magnitude of the variations resulting from theapplication of conventional wet etching processes of forming traces andspaces. Electrical structures in accordance with the present inventioninclude, but are not limited to, space transformers, single-chippackages, and multi-chip packages.

FIGS. 4-6 show exemplary cross-sectional views of traces formed inaccordance with embodiments of the present invention. More particularly,FIG. 4 is a cross-sectional representation of thick metal traces 402,404, 406, 408, and 410, in accordance with the present invention, havingsubstantially constant trace width 401, having varying trace thickness,having trace sidewalls that are substantially perpendicular to thesubstrate, and having substantially constant space width. As can be seenfrom the figure, trace width 401 is substantially constant even thoughthe heights (i.e., thicknesses) of traces 402, 404, 406, 408, and 410are not the same. FIG. 5 is a cross-sectional representation of thickmetal traces 502, 504, 506, 508, and 510, in accordance with the presentinvention, having substantially constant trace cross-sectional areas,having trace sidewalls that are substantially perpendicular to thesubstrate, and having substantially constant space width 401. In otherwords, the pitch of the traces is modified in accordance with thethickness of the metal layer so as to achieve substantially constantcross-sectional area, which in turn, relates to the effective resistanceof each trace. FIG. 6 is a cross-sectional representation of thick metaltraces 602, 604, 606, 608, and 610, in accordance with the presentinvention, having substantially constant trace width 401, havingsubstantially constant trace thickness, having trace sidewalls that aresubstantially perpendicular to the substrate, and having substantiallyconstant space width. The structure of FIG. 6 may be obtained by laseretching spaces in a substantially uniformly thick starting layer ofmetal, or by creating the structure of FIG. 4, and machining the tracesto planarize the top surface thereof.

In the following description, various aspects of the present inventionwill be described. However, it will be apparent to those skilled in theart that the present invention may be practiced with only some or allaspects of the present invention. For purposes of explanation, specificnumbers, materials and configurations are set forth in order to providea thorough understanding of the present invention. However, it will alsobe apparent to one skilled in the art that the present invention may bepracticed without those specific details. In other instances, well-knownfeatures are omitted or simplified in order not to obscure the presentinvention.

Reference herein to “one embodiment”, “an embodiment”, or similarformulations, means that a particular feature, structure, operation, orcharacteristic described in connection with the embodiment, is includedin at least one embodiment of the present invention. Thus, theappearances of such phrases or formulations herein are not necessarilyall referring to the same embodiment. Furthermore, various particularfeatures, structures, operations, or characteristics may be combined inany suitable manner in one or more embodiments.

Terminology

The expressions, laser cutting, laser editing, laser etching, lasermachining, laser micro-machining, laser processing, laser scribing, andsimilar terms and expressions are sometimes used interchangeably. Asused herein, these expressions refer to a process of removing materialfrom a workpiece by exposing that workpiece to the output of a laser.

The terms conductive line, metal line, conductive trace, interconnectline, wire, conductor, signal path and signaling medium are all related.The related terms listed above, are generally interchangeable. In thisfield, and in connection with the electrical structures referred toherein, electrically conductive metal lines are typically referred to astraces.

The expression, space transformer, refers to an electrical structurethat is used to achieve electrical connection between one or moreelectrical terminals that have been fabricated at a first scale, ordimension, and a corresponding set of electrical terminals that havebeen fabricated at a second scale, or dimension. In this field, a spacetransformer is sometimes referred to as a fan-out. A space transformer,or fan-out, essentially provides an electrical bridge between thesmallest features in one technology (e.g., pins of a probe card) and thelargest features in another technology (e.g., bonding pads of anintegrated circuit). An interposer may also be referred to as a spacetransformer.

The term, space, as used herein, generally refers to a space betweenelectrically conductive traces. Terms such as, trenches, gaps (air gapsif no other dielectric material is introduced therein), or slots, mayalso be used to refer to those regions between conductors. The height ofa space, unless specifically noted otherwise, is considered to be equalto the height of the surrounding electrically conductive material thatdefines the space.

The thickness of a conductive layer is sometimes referred to in thisfield in terms of ounces (oz.). This is based on the weight of onesquare foot of a conductive layer of a particular material andthickness. For example, a thickness referred to as 0.5 oz. copper, isapproximately 18 microns thick. Similarly, a thickness referred to as1.0 oz. copper, is approximately 36 microns thick, and so on.

Overview

In one aspect of the present invention, electrical structures are madeby laser etching, and all of those laser etching operations take place,from beginning to end, within a single laser etching system, via one ormore selectively controlled, appropriate laser beams, or pulses, whichare directed toward what is, initially, i.e., before laser etching, ablanket layer of electrically conductive material, such as, but notlimited to, a layer of copper. More particularly, by performing avariety of etching operations, such as for example, those that formfiducials, those that form isolated conductive traces from the blanketlayer of conductive material, those that cut alignment holes, those thatform cutting and folding lines, and those that act to singulate one ormore completed electrical structures, within a single laser etchingsystem, and using a unified coordinate database to define, or describe,these operations, the error budget for laser processing is reduced,thereby providing a methodology for obtaining tighter pitches, greaterdensities, and enhanced accuracy.

Process integration, in accordance with the present invention, includescombining multiple separate conventional process operations, typicallyperformed by separate machines, or tools, into one process, performed inan uninterrupted manner, within a single machine, and with each elementwithin the process being referenced to a single common coordinatesystem. Such process integration eliminates many of the workpiecealignment operations required by previous methods, therebyadvantageously improving accuracy. In some embodiments of the presentinvention, no realignment operations of the workpiece are performed, yetmultiple operations are performed on the workpiece. Furthermore, thisimproved positional accuracy allows laser etching operations to berepeated such that “fine-tuning”, or “touch-up” edits may be made.Process integration in accordance with the present invention eliminatesmost or all of the conventional realignment operations that result in aninability to repeat a laser etching pass. Put another way, embodimentsof the present invention, by virtue of the improved positional accuracyresulting from elimination of one or more realignment operations, mayinclude multiple laser etching passes over some or all of the exposedsurface of a workpiece.

Laser control is effected in such a fashion that, within thisenvironment, a defined pattern of differentiated conductors, which mayhave many different shapes, spacings, and organizations, is createdthrough what can be thought of as precision laser micro-machining thatremoves material to create separating gaps, thereby forming individualconductive traces. Experience and practice with the invention hasdemonstrated the ability of this laser fabrication approach to createunique patterns of conductors, including patterns with an extremely higharea-density of conductors, characterized by cross-sectional andspatial-separation aspect ratios that afford an opportunity for thecreation of unique inter-conductor electrical characteristics whichoffer advantages in a number of different applications, including spacetransformer applications. Laser micro-machining, performed in accordancewith the present invention, is capable of producing confrontingconductive walls, in regions where conductive material is removed, thatare substantially precisely planar, accurately and precisely positionedrelative to one another, and defined by facing wall expanses which havea material height relative to the supporting plane of a joined substratewhich cannot be achieved by conventional etching. Conventional etching,as is well known, produces undercutting of material during the removalprocess.

In some embodiments of the present invention, the integrated processincludes laser etching bar codes on the workpiece by removing portionsof, at least, the conductive material. Such bar code etching may beformed at a size wherein magnification via an optical instrument such asa microscope is required to read the bar code, or the bar code may beformed at a human readable scale. It is noted that in addition to barcodes, any other graphical coding system or character set may be used,wherein various graphical symbols or character set elements are formedon the workpiece as part of the integrated process flow in accordancewith the present invention. Similarly, in some embodiments of thepresent invention, the integrated process includes laser etchingalphanumeric text characters of microscopic or human readable dimensioninto the workpiece.

ILLUSTRATIVE PROCESS EXAMPLES

In an illustrative embodiment of the present invention, laser pulses areused to “edit” a blanket layer of conductive material disposed on afirst side, or surface, of an electrically insulating substrate, so asto form conductive traces thereon. That is, conductive traces areproduced by the creation of spaces, which result from the laser editingprocess. More particularly, in this illustrative embodiment, the laserpulses remove a portion of the total amount of electrically conductivematerial that is desired to be removed with each pulse. In this way,several pulses are required to completely etch out the space so that twoadjacent conductive traces are not electrically shorted together. Thespace is therefore considered to be etched out when the application oflaser energy has removed the conductive material down to the insulatingsubstrate. It is desirable to form the spaces such that the conductivetraces have sidewalls that are perpendicular, or substantiallyperpendicular, to the substrate, smooth, and evenly spaced apart fromone another along the length of the space, and further desirable toavoid damaging, i.e., unintentionally removing portions of theunderlying substrate, or to unintentionally change the electricalcharacteristics of the underlying substrate.

It is noted that in some instances, an adhesive material is disposedbetween the conductive material and the substrate so as to provide forimproved adhesion of the metal traces to the insulating substratematerial.

Typically, the conductive material is a metal, such as, but not limitedto, copper. Further, the thickness and type of the conductive materialis typically known, or determined, prior to laser etching the spaces sothat the laser energy, pulse width, and relative velocity of the laserspot with respect to the workpiece, can be properly set. In typicalembodiments of the present invention, the laser spot diameter is in therange of 18 microns to 25 microns; the laser spot scan rate is in therange of 20 mm/sec to 40 mm/sec; the laser beam wave length is in therange of 266 nm to 355 nm; the pulse energy is in the range of 10 to 50microjoules; the pulse width (half height) is in the range of 15 to 30ns; and the pulse rate is approximately 10 kHz.

In some instances it may be desirable to form a trench in the substrate.Typically, such a trench immediately underlies the space between twoconductive traces. In one embodiment of the present invention, such atrench in the substrate is formed essentially concurrently with theformation of an overlying space. That is, once the overlying conductivematerial is removed, the pulsed laser energy is used to continueremoving material at those coordinates until a trench in the substrateof a desired depth is reached.

It is noted that by removing such portions of the substrate, thecapacitance between two adjacent conductive traces is changed. Moreparticularly, the capacitance is typically reduced because thedielectric constant of air is typically less than that of the insulatingportion of the substrate which was removed. In alternative embodimentsof the present invention, portions of the trench; the whole trench; thewhole trench and portions of the space superjacent the trench; the wholetrench and the whole space superjacent the trench, or any similarcombination, may be backfilled with one or more dielectric materials,such that the capacitance between adjacent traces may be adjusted. Insuch embodiments the dielectric material may have a dielectric constantthat is greater than that of the substrate material. It is furthernoted, that in those instances where an adhesive is disposed between themetal and the substrate, the formation of a trench in the substrateincludes laser etching a portion of the adhesive. In various embodimentsof the present invention wherein the workpiece includes the adhesivelayer, it is possible to etch combinations of adhesive only, andadhesive and substrate material.

In addition to preparing traces and spaces by way of laser etching,various embodiments of the present invention include forming, again byway of laser etching, one or more fiducials, alignment holes, cuttinglines, folding lines, and may further include singulation of alaser-edited product from its surrounding or supporting substrate.

Fiducials, or fiducial marks, are sometimes referred to targets becausethey are target images which are searched for, and recognized by,machine vision systems, or human operators. In one illustrative example,fiducial marks on a printed circuit board are recognized by a machinevision system, and such system communicates with associated handlingequipment such that subsequent manufacturing operations are properlyachieved. Fiducials, whether on a printed circuit board or other type ofsubstrate may be formed in accordance with the present invention bylaser etching portions of a conductive layer on that substrate so as toform a recognizable, pre-determined target image. In other embodiments,formation of fiducials may include laser etching portions of thesubstrate material, including, in some embodiments, even etching all theway through a substrate. In accordance with the present invention,formation of one or more fiducials, is accomplished by laser etching,typically in multiple passes, within a single laser etching system, inconjunction with the formation of one or more other laser-etchedfeatures wherein the workpiece is not removed from the laser etchsystem.

Alignment holes are used, after an electrical structure in accordancewith the present invention is formed, to provide mechanical alignmentwith another mechanical element, whereby alignment pins, which areattached to the other mechanical element, are received through thealignment holes, thereby bringing the electrical structure into apredetermined mechanical alignment with that other mechanical element.Alignment holes may be formed in accordance with the integrated processof the present invention by laser etching a hole of predetermineddimension through the conductive material, through the adhesive materialif such is present, and through the substrate. Formation of the hole maybe accomplished by removing all the material by application of laserenergy, or by forming, for example, an annular region of removedmaterial such that the remaining material, interior to the annularregion is singulated, i.e., removed from the workpiece. Alignment holesare typically, but not required to be, circular. Alignment holes formedin accordance with the present invention provide improved tolerances,and therefore better mechanical alignment with other mechanical objectsthan can be obtained by conventional methods of forming alignment holes,such as drilling or routing.

Folding lines are regions of a workpiece that have been removed tofacilitate physically folding the electrical structure subsequent to thelaser etching of integrated process in accordance with the presentinvention. Folding lines may be formed in accordance with the presentinvention by removing portions of the conductive material, similar toforming a space, or may include removing portions of the conductivematerial so as to form a “dotted” line which facilitates folding.Formation of the dotted folding lines may also include removing regionsof the substrate underlying the portions of conductive material removedfor the purpose of defining, forming, the folding lines.

Cutting lines are similar to folding lines, but are typically formedcontinuously, that is, not in “dotted” lines, and are used to remove oneor more sections from the workpiece. These are formed in accordance withthe integrated process of the present invention by laser etching.

Singulation refers to the process of separating a laser-editedelectrical structure from the substrate from which it was formed.Singulation may be achieved in accordance with the present invention bylaser etching a “border” which defines the outer dimensions of theelectrical structure. Singulation etching may be done completely aroundthe electrical structure, or may be done in a partial manner such thatone or more tabs remain. Such tabs provide a means of maintaining theelectrical structure in place relative to the substrate from which itwas formed. In embodiments in which tabs remain, the electricalstructure is typically removed from the surrounding substrate by amechanical twisting operation, although, any suitable method, including,but not limited to laser etching of the tabs, may be used.

Passivation removal refers to removing portions of an electricallyinsulating layer that overlies the conductive layer which is disposed ona surface of substrate. More particularly, a workpiece includes asubstrate and a copper layer disposed thereon. The copper layer has aninsulator, such as but not limited to, polyimide, disposed on the copperlayer. In some embodiments of the integrated process of the presentinvention, subsequent to the formation of traces, which includesremoving polyimide and copper, additional regions of polyimide areremoved (referred to as passivation opening) so that electrical contactto a portion of the copper may be had. Passivation opening, inaccordance with the present invention, is performed without removing theworkpiece from the laser etching system, and without realigning theworkpiece.

FIG. 7 illustrates one embodiment of the integrated process of thepresent invention. More particularly, a method of making an electricalstructure, includes preparing a database 702. This includes providinginformation regarding the geometrical description of the variousportions of the workpiece to be removed by the laser etching system.Each of the various elements formed, for example traces, fiducials,alignment holes, trenches, passivation openings, etc. are defined withrespect to a common, or unified coordinate system. Because the workpieceis not removed from the laser etching system, no realignment of theworkpiece is performed and the coordinates of each geometricaldescription remain defined within the uninterrupted coordinate referencesystem. The substrate is placed 704 in a first laser processing system,and the substrate is made from an electrically insulating material, anda first blanket layer of conductive material is disposed on a firstsurface thereof. At least one fiducial is formed 706 by laser etching.Portions of the conductive material are removed 708 by laser etching soas to form isolated conductive traces. At least one alignment holesuitable for receiving therethrough at least one alignment pin is formedby laser etching 710. At least one folding line is formed by laseretching 712. The electrical structure formed by the various laseretching operations that take place without removal from the laseretching system and without realignment of the workpiece, is thensingulated 714.

FIG. 8 illustrates one embodiment of the integrated process of thepresent invention. In this illustrative embodiment, a method of makingan electrical structure, includes providing 802 an insulating substratethat has a first major surface and a second major surface on an oppositeside, and that has a layer of metal disposed on the first major surface.The substrate may be rigid or flexible, it may be a simple or complex,and may be made of FR-4, polyimide, epoxy, or any other materialsuitable for use as a substrate for an electrical product. At least oneportion of the layer of metal is removed 804 by laser etching so as toform at least one trace and at least one space adjacent thereto. In thisillustrative embodiment, the at least one trace has a height, a width,and a first aspect ratio (height/width); and the at least one space hasa height, a width, and a second aspect ratio (height/width), and thesecond aspect ratio is greater than the first aspect ratio.

FIG. 9 illustrates one embodiment of the integrated process of thepresent invention. In this illustrative embodiment of the presentinvention, a method of forming a space transformer, includes placing 902a substrate with a first major surface and a second major surface, thesubstrate comprising an electrically insulating material, and a firstlayer of material disposed on the first major surface, into a firstpulsed laser etching system. Etching 904, with the first pulsed laseretching system, portions of the first layer and portions of thesubstrate to form at least one fiducial. Without removing the substratefrom the first pulsed laser etching system, etching 906 portions of thefirst layer to form conductive traces separated by spaces. Withoutremoving the substrate from the first pulsed laser etching system,etching 908 portions of the first layer and the substrate to formalignment holes. Without removing the substrate from the first pulsedlaser etching system, laser etching 910 folding lines. Without removingthe substrate from the first pulsed laser etching system, etching 912portions to singulate the space transformer. It is noted that, in thisillustrative embodiment, no realignment of the substrate (i.e., theworkpiece) takes place between the various laser etching operations, andthat the width of the spaces is less than the width of the conductivetraces.

CONCLUSION

In accordance with the present invention, an integrated process forforming electrical structures provides improved dimensional accuracy andcost-effective manufacturing.

An advantage of some embodiments of the present invention is thatextremely dense landscapes of conductors can be created which allow forthe creation of electrical structures that can be significantly smallerin overall size than counterparts fabricated with conventional methods.

An advantage of some embodiments of the present invention is that thehigh density, which results from the ability to form very narrow spaces,allows electrical structures to be formed with less material than wouldbe consumed by conventional fabrication methods.

Among the products which can readily be made by practice of the presentinvention, are uniquely structured devices, such as space transformers.Moreover, single-layer space transformers, are formable and capable ofhandling space-transformer requirements for devices which heretoforehave had to be dealt with by more complicated, expensive, and difficultto manufacture, multi-layer assemblies. Single-layer space transformerstructures uniquely created by embodiments of the present invention, arevery much in that category of offering the opportunity to present to theend user a very simply manufactured, relatively inexpensively created,high-density, single-manufacturing-step component which can be madeeasily, economically and selectively both in very small quantities andin much larger batches if required.

It is to be understood that the present invention is not limited to theembodiments described above, but encompasses any and all embodimentswithin the scope of the Claims.

1-31. (canceled)
 32. A method of making an electrical structure,comprising: providing an insulating substrate having a first majorsurface and a second major surface opposite the first major surface,with a layer of metal disposed on the first major surface; and removing,by laser etching, at least one portion of the layer of metal so as toform at least one trace and at least one space adjacent thereto; whereinthe at least one trace has a height, a width, and a first aspect ratio(height/width); and the at least one space has a height, a width, and asecond aspect ratio (height/width), and wherein the second aspect ratiois greater than the first aspect ratio
 33. The method of claim 32,wherein the trace comprises copper, and the height of the conductivetrace is in the range of 9 to 72 microns.
 34. The method of claim 33,wherein the second aspect ratio is in the range of 0.75 to 50.